GNU Make Wiki

This markdown is a sketched summary of the Managing Projects with GNU Make.¹

Glossary

1. Target: Usually the name of the file generated by the command, sometimes the name of the action such as clean.
2. Prerequisite: Other target that is required to build the current one. A rule may include multiple prerequisites. Prerequisites can also be non-target files.
3. Recipe: Set of commands for the target.
4. Rule: The combination of target prerequisite and recipe.
5. Goal: Goals are the targets that make strives ultimately to update.

Makefile Rule Syntax

target1 target2: prerequisite1 prerequisite2 ...
	recipe1
	recipe2
	...

• Rule starts with the target, then a colon : to separate prerequisites written in the same line. Recipes are written on new line after a tab \t character.
• Target of a rule is generally single but it can also be multiple.
• Comment character in makefile is #.
• Both multiline comments and prerequisites can be continued by using \ (Unix escape character).

Makefile can be executed by make command. make cli has an optional target argument. Default behavior is to use the first target from the makefile called default goal.

Simple Rule

foo: foo.c
	gcc foo.c -o foo

Typically real makefiles consist of more rules. Ordering of the rules in a makefile is generally from the most general rule to its detailed rules. Most general target at the top of the makefile is generally called all.

Simply, make decides what target to build by checking prerequisites. It prepares the prerequisites of the rule before executing the recipe of the target itself. If a target is newer than all of its prerequisites, meaning no change has been done, make won’t rebuild the target.

Prerequisites

• Library flags can also be prerequisites, for example the -lfl flag for flex library. When -l<NAME> is seen make searches for lib<NAME>.so and lib<NAME>.a files.

Useful command-line options

• --just-print or -n displays commands that would be executed for a given target.

References